Tuesday, October 21, 2008

Intel® Itanium® Processor 9000 Sequence

Intel® Itanium® Processor
Itanium®-based servers deliver the scalable performance, reliability, and headroom for your most compute-intensive workloads, including direct replacement for RISC and mainframe platforms. Because Itanium processors are available in commercial off-the-shelf hardware from a rich ecosystem of system and solution providers, they can quickly meet mission-critical needs.

Itanium-based servers are incredibly scalable, allowing configuration in systems of as many as 512 processors and a full petabyte (1024TB) of RAM. Together with full support for both 32-bit and 64-bit applications, that capacity provides unmatched flexibility in tailoring systems to your enterprise needs.



Product information

Explore the following resources for more in-depth information about the Intel Itanium processor 9000 sequence:




Featured papers



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Features and benefits
Dual-core processing, EPIC architecture, and Hyper-Threading Technology† Supports massive, multi-level parallelism for today's data-intensive workloads

Provides headroom for fast access to information and real-time decision making

Delivers fast responses to complex computations
Support for up to 512 processors and one petabyte (1024TB) RAM Provides scalable performance for enterprise flexibility

Gives IT the ability to increase processor and memory capacity as needed, in an open-ended framework
Up to 24MB of low-latency L3 cache Prevents idle processing cycles with a high-bandwidth data supply to the execution cores

Increases the efficiency of the memory subsystem
Intel® Cache Safe Technology Automatically recovers cache after cache errors

Delivers mainframe-class availability
Enhanced Machine Check Architecture Automatically detects, logs, and corrects errors

Provides maximum system uptime
Intel® Virtualization Technology (Intel® VT)± Reduces virtualization complexity and increases performance

Increases operating system compatibility
Demand-Based Switching Dynamically reduced energy consumption during typical CPU utilization (in conjunction with enabled OS)
Core Level Lock-step Enables one processor core to mirror the operations of the other

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